The work characteristics of the current mode converter under the conditions of high input voltage and low output voltage

that is

low duty cycle and light output load are introduced. The minimum On time of PWM converter decided by the duration of leading edge blanking time and current detection time delay is discussed. At a certain frequency

the minimum On time decides the maximum critical input voltage. At light output load

when practical input voltage is close to the maximum critical input voltage

the system goes into the voltage mode from the current mode and oscillates due to insufficient phase margin at feedback link. When practical input voltage exceeds the maximum critical input voltage

the system is forced into skipping pulsed mode

thus the oscillation and big output ripple appear. According to the characteristics of entering voltage mode at light output load

the solution with using output electrolytic capacitance is proposed

the corresponding results and waveforms are given

and the reasons why the phase margin increases by using output electrolytic capacitance is also explained.